Yehya Nasser (2AI) has been invited by Infineon Technologies on March 28 to give a talk on “High-Level Power Estimation Method for Power and Security Assessments for Faster Time-to-Market”
Abstract: In this talk, the focus will be on the intersection of two important aspects of hardware design: power modelling and security. The first part of the talk will cover various techniques for modelling power consumption in VLSI circuits, including our developed tool NeuPow on FPGAs and CPUs. The second part will explore the power modelling and estimation implications in security assessments, including vulnerabilities such as power analysis and side-channel attacks.The session will conclude by discussing how to utilise the goals of high-level power modelling and security in hardware VLSI design, and highlighting future research directions in this area.
