Seminar: Study and design of a digital transceiver for wireless networks-on-chip

Speaker: Joel Ortiz Sosa

Abstract: Emerging high-performance computing applications require the use of processors relying on an increasing number of cores and thus on an efficient on-chip interconnect system. Wireless on-chip networks (WiNoC) offer a promising solution for these architectures, mainly enabling efficient links and inherently supporting broadcast and multicast communications. In this context, we propose the design of a digital transceiver architecture for a WiNoC and analyze the gains obtained in terms of performance and energy efficiency compared to conventional NoC solutions.