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Working group on RISC-V processor ISA, architectures and tools

This working group aims to present and discuss contributions as well as technical and bibliographic studies from team members and guests.

Announcements are made through a dedicated mailing list (managed by V. Lapôtre).

Next meeting

  • To be defined

Past Meetings / Archives

Archive for 2020

  • December 7, 2020 : presentation by Maël T. : "A quick start : RISC-V Toolchain and PicoRV32 core".
  • October 12, 2020 : GT RISC-V first meeting and presentation by Vianney L. : "Overview of existing RISC-V cores".