Topic: Hardware implementation of fully pipelined Turbo decoders
Funding: This PhD position will be conducted within the framework of the ANR JCJC TurboLEAP Project
Expected start date: September, 1st, 2021
Host laboratory: Lab-STICC/IMT Atlantique, under joint supervision between teams 2AI and CODES
Keywords: Hardware design, channel coding, digital communications, turbo codes.
The full description of the research context and proposed PhD work is available here -> PhD TurboLEAP HW May2021.
The candidate should hold a Master degree or an engineering degree in digital communications. The following qualifications are beneficial for the completion of the project:
- Experience with one or more of the following languages: C, C++, Python
- Experience with one of the following hardware description languages: VHDL, Verilog, SystemC
- Experience with hardware development on FPGA and/or ASIC
- Advanced lectures on channel coding and communication systems
Contact and application procedure: